hexfet ? power mosfet IRFI520N pd - 9.1362a 3/16/98 v dss = 100v r ds(on) = 0.20 w i d = 7.6a s d g to-220 fullpak l advanced process technology l isolated package l high voltage isolation = 2.5kvrms ? l sink to lead creepage dist. = 4.8mm l fully avalanche rated parameter min. typ. max. units r q jc junction-to-case CCCC CCCC 5.0 r q ja junction-to-ambient CCCC CCCC 65 thermal resistance parameter max. units i d @ t c = 25c continuous drain current, v gs @ 10v 7.6 i d @ t c = 100c continuous drain current, v gs @ 10v 5.3 a i dm pulsed drain current ?? 38 p d @t c = 25c power dissipation 30 w linear derating factor 0.20 w/c v gs gate-to-source voltage 20 v e as single pulse avalanche energy ?? 91 mj i ar avalanche current ?? 5.7 a e ar repetitive avalanche current ? 3.0 mj dv/dt peak diode recovery dv/dt ?? 5.0 v/ns t j operating junction and -55 to + 175 t stg storage temperature range c soldering temperature, for 10 seconds 300 (1.6mm from case) mounting torque, 6-32 or m3 screw. 10 lbf?in (1.1n?m) absolute maximum ratings description fifth generation hexfets from international rectifier utilize advanced processing techniques to achieve the lowest possible on-resistance per silicon area. this benefit, combined with the fast switching speed and ruggedized device design that hexfet power mosfets are well known for, provides the designer with an extremely efficient device for use in a wide variety of applications. the to-220 fullpak eliminates the need for additional insulating hardware in commercial-industrial applications. the moulding compound used provides a high isolation capability and a low thermal resistance between the tab and external heatsink. this isolation is equivalent to using a 100 micron mica barrier with standard to-220 product. the fullpak is mounted to a heatsink using a single clip or by a single screw fixing. preliminary c/w
IRFI520N parameter min. typ. max. units conditions v (br)dss drain-to-source breakdown voltage 100 CCC CCC v v gs = 0v, i d = 250a d v (br)dss / d t j breakdown voltage temp. coefficient CCC 0.11 CCC v/c reference to 25c, i d = 1ma ? r ds(on) static drain-to-source on-resistance CCC CCC 0.20 w v gs = 10v, i d = 4.3a ? v gs(th) gate threshold voltage 2.0 CCC 4.0 v v ds = v gs , i d = 250a g fs forward transconductance 2.7 CCC CCC s v ds = 25v, i d = 5.7a ? CCC CCC 25 v ds = 100v, v gs = 0v CCC CCC 250 v ds = 80v, v gs = 0v, t j = 150c gate-to-source forward leakage CCC CCC 100 v gs = 20v gate-to-source reverse leakage CCC CCC -100 v gs = -20v q g total gate charge CCC CCC 25 i d = 5.7a q gs gate-to-source charge CCC CCC 4.4 nc v ds = 80v q gd gate-to-drain ("miller") charge CCC CCC 11 v gs = 10v, see fig. 6 and 13 ?? t d(on) turn-on delay time CCC 4.5 CCC v dd = 50v t r rise time CCC 23 CCC i d = 5.7a t d(off) turn-off delay time CCC 32 CCC r g = 22 w t f fall time CCC 23 CCC r d = 8.6 w, see fig. 10 ?? between lead, 6mm (0.25in.) from package and center of die contact c iss input capacitance CCC 330 CCC v gs = 0v c oss output capacitance CCC 92 CCC v ds = 25v c rss reverse transfer capacitance CCC 54 CCC ? = 1.0mhz, see fig. 5 ? c drain to sink capacitance CCC 12 CCC ? = 1.0mhz nh a na i dss drain-to-source leakage current i gss l s internal source inductance CCC CCC ns s d g 4.5 7.5 electrical characteristics @ t j = 25c (unless otherwise specified) CCC l d internal drain inductance CCC CCC CCC pf parameter min. typ. max. units conditions i s continuous source current mosfet symbol (body diode) showing the i sm pulsed source current integral reverse (body diode) ?? p-n junction diode. v sd diode forward voltage CCC CCC 1.3 v t j = 25c, i s = 4.3a, v gs = 0v ? t rr reverse recovery time CCC 99 150 ns t j = 25c, i f = 5.7a q rr reverse recoverycharge CCC 390 580 nc di/dt = 100a/s ?? source-drain ratings and characteristics a CCC CCC 38 CCC CCC 7.6 s d g notes: ? repetitive rating; pulse width limited by max. junction temperature. ( see fig. 11 ) ? v dd = 25v, starting t j = 25c, l = 4.7mh r g = 25 w , i as = 5.7a. (see figure 12) ? t=60s, ?=60hz ? i sd 5.7a, di/dt 240a/s, v dd v (br)dss , t j 175c ? uses irf520n data and test conditions ? pulse width 300s; duty cycle 2%.
IRFI520N fig 1. typical output characteristics fig 3. typical transfer characteristics fig 4. normalized on-resistance vs. temperature fig 2. typical output characteristics 1 10 100 0.1 1 10 100 4.5v i , d rain-to-source current (a) d v , drain-to-source voltage (v) ds vgs top 15v 10v 8.0v 7.0v 6.0v 5.5v 5.0v bottom 4.5v 20s pulse w idth t = 175c c a 1 10 100 0.1 1 10 100 i , d rain-to-source current (a) d v , drain-to-source voltage (v) ds vgs top 15v 10v 8.0v 7.0v 6.0v 5.5v 5.0v bottom 4.5v 20s pulse w idth t = 25c c a 4.5v 1 10 100 45678910 t = 25c j gs v , g ate-to-source volta g e ( v ) d i , drain-to-source current (a) v = 50v 20s pulse w idth ds t = 175c j a 0.0 0.5 1.0 1.5 2.0 2.5 3.0 -60 -40 -20 0 20 40 60 80 100 120 140 160 180 j t , junction temperature (c) r , drain-to-source o n resistance ds(on) (n orm alized) v = 10v gs a i = 9.5a d
IRFI520N fig 7. typical source-drain diode forward voltage fig 5. typical capacitance vs. drain-to-source voltage fig 8. maximum safe operating area fig 6. typical gate charge vs. gate-to-source voltage 0 100 200 300 400 500 600 1 10 100 c, capacitance (pf) ds v , drain-to-source voltage (v) a v = 0v, f = 1mhz c = c + c , c shorted c = c c = c + c gs iss gs gd ds rss gd oss ds gd c iss c oss c rss 0 4 8 12 16 20 0 5 10 15 20 25 q , total g ate charge (nc) g v , g ate-to-source voltage (v) gs v = 80v v = 50v v = 20v ds ds ds a for test circuit see figure 13 i = 5.7a d 1 10 100 0.4 0.6 0.8 1.0 1.2 1.4 t = 25c j v = 0v gs v , source-to-drain volta g e (v) i , reverse drain current (a) sd sd a t = 175c j 0.1 1 10 100 1 10 100 1000 v , drain-to-source voltage (v) ds i , drain current (a) op e ratio n in this a re a lim ite d by r d ds(on) 10s 100s 1ms 10ms a t = 25c t = 175c single pulse c j
IRFI520N fig 9. maximum drain current vs. case temperature fig 10a. switching time test circuit v ds 90% 10% v gs t d(on) t r t d(off) t f fig 10b. switching time waveforms fig 11. maximum effective transient thermal impedance, junction-to-case v ds pulse width 1 s duty factor 0.1 % r d v gs r g d.u.t. 10v + - v dd 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 notes: 1. duty factor d = t / t 2. peak t = p x z + t 1 2 j dm thjc c p t t dm 1 2 t , rectangular pulse duration (sec) thermal response (z ) 1 thjc 0.01 0.02 0.05 0.10 0.20 d = 0.50 single pulse (thermal response) 25 50 75 100 125 150 175 0.0 2.0 4.0 6.0 8.0 t , case temperature ( c) i , drain current (a) c d
IRFI520N fig 12a. unclamped inductive test circuit fig 12b. unclamped inductive waveforms v ds l d.u.t. v dd i as t p 0.01 w r g + - t p v ds i as v dd v (br)dss 10 v q g q gs q gd v g charge 10 v d.u.t. v ds i d i g 3ma v gs .3 m f 50k w .2 m f 12v current regulator same type as d.u.t. current sampling resistors + - fig 13a. basic gate charge waveform fig 12c. maximum avalanche energy vs. drain current fig 13b. gate charge test circuit 0 40 80 120 160 200 25 50 75 100 125 150 175 j e , single pulse avalanche energy (mj) as a starting t , junction temperature (c) v = 25v i top 2.3a 4.0a bottom 5.7a dd d
IRFI520N p.w. period di/dt diode recovery dv/dt ripple 5% body diode forward drop re-applied voltage reverse recovery current body diode forward current v gs =10v v dd i sd driver gate drive d.u.t. i sd waveform d.u.t. v ds waveform inductor curent d = p. w . period + - + + + - - - * v gs = 5v for logic level devices ? ? ? r g v dd dv/dt controlled by r g driver same type as d.u.t. i sd controlled by duty factor "d" d.u.t. - device under test d.u.t circuit layout considerations low stray inductance ground plane low leakage inductance current transformer ? * fig 14. for n-channel hexfets peak diode recovery dv/dt test circuit
IRFI520N package outline to-220 fullpak outline dimensions are shown in millimeters (inches) to-220 fullpak part marking information lead assignments 1 - g ate 2 - d ra in 3 - so u rc e notes: 1 dimensioning & tolerancing per ansi y14.5m, 1982 2 controlling dimension: inch. d c a b minimum creepage distance betw een a-b-c-d = 4.80 (.189) 3x 2.85 (.112) 2.65 (.104) 2.80 (.110) 2.60 (.102) 4.80 (.189) 4.60 (.181) 7.10 (.280) 6.70 (.263) 3.40 (.133) 3.10 (.123) ? - a - 3.70 (.145) 3.20 (.126) 1.15 (.045) m in . 3.30 (.130) 3.10 (.122) - b - 0.90 (.035) 0.70 (.028) 3x 0.25 (.010) m a m b 2.54 (.100) 2x 3x 13.70 (.540) 13.50 (.530) 16.00 (.630) 15.80 (.622) 1 2 3 10.60 (.417) 10.40 (.409) 1.40 (.055) 1.05 (.042) 0.48 (.019) 0.44 (.017) part number international rectifier lo go date code (yyw w ) yy = year ww = week assembly lot co de e401 9245 irfi840g exam ple : th is is an ir fi840g w ith assem bly lo t co d e e401 a world headquarters: 233 kansas st., el segundo, california 90245, tel: (310) 322 3331 european headquarters: hurst green, oxted, surrey rh8 9bb, uk tel: ++ 44 1883 732020 ir canada: 7321 victoria park ave., suite 201, markham, ontario l3r 2z8, tel: (905) 475 1897 ir germany: saalburgstrasse 157, 61350 bad homburg tel: ++ 49 6172 96590 ir italy: via liguria 49, 10071 borgaro, torino tel: ++ 39 11 451 0111 ir far east: k&h bldg., 2f, 30-4 nishi-ikebukuro 3-chome, toshima-ku, tokyo japan 171 tel: 81 3 3983 0086 ir southeast asia: 315 outram road, #10-02 tan boon liat building, singapore 0316 tel: 65 221 8371 http://www.irf.com/ data and specifications subject to change without notice. 3/98
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